000			03042nam a22003498i 4500
001			CR9780511541117
003			UkCbUP
005			20200124160331.0
006			m|||||o||d||||||||
007			cr||||||||||||
008			090501s2007||||enk o ||1 0|eng|d
020			_a9780511541117 (ebook)
020			_z9780521865814 (hardback)
020			_z9781107411548 (paperback)
040			_aUkCbUP _beng _erda _cUkCbUP
050	0	0	_aTK7874.75 _b.T36 2007
082	0	4	_a621.395 _222
100	1		_aTan, Sheldon X. D., _eauthor.
245	1	0	_aAdvanced model order reduction techniques in VLSI design / _cSheldon X.-D. Tan, Lei He.
264		1	_aCambridge : _bCambridge University Press, _c2007.
300			_a1 online resource (xviii, 240 pages) : _bdigital, PDF file(s).
336			_atext _btxt _2rdacontent
337			_acomputer _bc _2rdamedia
338			_aonline resource _bcr _2rdacarrier
500			_aTitle from publisher's bibliographic system (viewed on 05 Oct 2015).
505	0		_aList of figures; List of tables; Preface; 1. Introduction; 2. Projection-based model order reduction algorithms; 3. Truncated balanced realization methods for model order reduction; 4. Passive balanced truncation of linear systems in descriptor form; 5. Passive hierarchical model order reduction; 6. Terminal reduction of linear dynamic circuits; 7. Vector potential equivalent circuit for inductance modeling; 8. Structure-preserving model order reduction; 9. Block structure-preserving reduction for RLCK circuits; 10. Model optimization and passivity enforcement; 11. General multi-port circuit realization; 12. Model order reduction for multi-terminal linear dynamic circuits; 13. Passive modeling by signal waveform shaping; References; Index.
520			_aModel order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This 2007 book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.
650		0	_aIntegrated circuits _xVery large scale integration _xDesign.
700	1		_aHe, Lei, _eauthor.
776	0	8	_iPrint version: _z9780521865814
856	4	0	_uhttps://doi.org/10.1017/CBO9780511541117
999			_c522543 _d522541